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This page should collect all information that is available on the hardware of the Himalaya. As it is a closed device this will be a task that will be pieced together over time. A good overview of how all hardware in the Himalaya fits together can be found in the HimalayaHardwareOverview.

The main hardware is the Intel XScale PXA263 processor. Here is the Developers Manual

The following links will need to be populated over time. If you found something place it on the relevant page:

To help reversing I created two IDAPro IDC files that will add most register definitions for xscale to your database. Note the scripts also generate the relevant segments. One is for the physical addressing (relevant in the early stages of booting) the other one maps the registers for the MMU mapping of WinCE. Due to the identical naming in both files you can't load them both. Either rename all registers with a prefix in one or create two databases. The scripts were generated from pxa-regs.h and ipaq-asic3.h in the 2.6 kernel sources.




The following files implement what is known about ASIC3: